Sequential Logic

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Sequential Logic

Combinational circuits can perform any desired logical operation to take a set of input signals and turn them into an entirely different set of output signals. However, they have a couple of shortcomings: they cannot remember the previous state of their inputs, and they cannot select when to produce their output signals. They simply react to any changes in their inputs by changing their outputs according to their internal logic.

To fill in these missing capabilities, we need a digital memory circuit, and we need the ability to synchronize digital events. Such a circuit can deal with a sequence of digital events, and is therefore known as sequential logic.

RS NAND Latch: A very simple one-bit memory circuit.
RS NOR Latch: The one-bit memory using NOR gates.
Clocked RS Latch: Adding a clocking input to control the timing of the NAND latch.
RS Flip-Flop: A memory that can only change state on one clock transition.
JK Flip-Flop: Eliminating race conditions.
D Latch: Sometimes we want a single data input to the memory circuit, rather than separate inputs for Set and Reset.
D Flip-Flop: The edge-triggered version of the D latch.
Flip-Flop Symbols: With all these different kinds of latches and flip-flops, we need schematic symbols that can distinguish among them.
Converting Flip-Flop Inputs: What can you do if you need a D flip-flop, but all you have is RS flip-flops?