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Parallel-to-Serial Shift Register

Where there is a need for serial-to-parallel conversion, there is also a need for parallel-to-serial conversion. The parallel-in, serial-out register (or parallel-to-serial shift register, or shift-out register), however, is a bit more complex than its counterpart. Since each flip-flop in the register must be able to accept data from either a serial or a parallel source, a small two-input multiplexer is required in front of each input. An extra input line selects between serial and parallel input signals, and as usual the flip-flops are loaded in accordance with a common clock signal.

The shift-out demonstration circuit below is limited to four bits so it can fit horizontally on a reasonable page. This is also a practical size for commercial ICs. A 4-bit shift register with parallel and serial inputs and outputs will fit nicely into a 14-pin DIP IC.

In addition, this demonstration circuit introduces a new input button: a mode control. The button labelled "S" indicates that the shift-out register is currently in serial mode. Thus, input signals present at the serial input just above the "S" button will be shifted into the register one by one with each clock pulse. If you click on the "S" button, it will change state as expected, but will also change to a "P" to indicate that the register now operates in parallel mode. This enables you to load the entire register at once from the parallel inputs just below the multiplexers. Thus, we can have a parallel input and a serial output. The inclusion of a serial input makes it possible to cascade multiple circuits of this type in order to increase the number of bits in the total register. This is common practice in real-world circuits.

Because this circuit has both parallel and serial inputs and outputs, it can serve as either a shift-in register or a shift-out register. This capability can have advantages in many cases.

The least significant bit (LSB) is always available first at the serial output.

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