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www.play-hookey.com | Thu, 03-11-2010 |
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| Two-Input DTL NOR Gate |
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In the previous experiment, we found that we could combine a Diode Logic AND gate with a DTL inverter, and thereby create a DTL NAND gate. This leads us to the question, "Can we combine a DL OR gate with a DTL inverter to get a NOR gate?"
We could do that, but we might run into a bit of trouble. Both the inverter and the NAND gate use a pull-up resistor in the base circuit of the transistor, and the preceding gate must actively pull the input down to logic 0 in order to override that behavior. However, the DL OR gate would require the active drive current for the transistor to come from the previous circuit. This led to trouble with Diode Logic, since it changed all the references around. We would prefer to keep the input circuit for DTL gates operating in the same way for all gates.
We can accomplish this by using the same technique that we used with RTL. That is, we can combine the outputs of multiple inverters to provide a NOR function. We'll explore this idea in this experiment.
The DTL NOR gate combines multiple DTL inverters with a common output as shown in the schematic diagram to the right. This is exactly the same as the method used to combine RTL inverters to form a NOR gate. Any number of inverters may be combined in this fashion to allow the required number of inputs to the NOR gate.
It would have been possible to construct the NOR gate by using a Diode Logic OR gate followed by a transistor inverter, just as we used a DL AND gate as the input to the DTL NAND gate. However, if we did that, the input circuitry for the NOR gate would have very different characteristics than the input circuitry for the NAND gate, and this might well lead to some serious complications in the design of any circuit involving both types of gates. By keeping the input circuitry and behavior of all gates the same, we ensure that the input characteristics of all gates will be consistent and easy to work with.
To construct and test the two-input DTL NOR gate circuit on your breadboard, you will need the DTL NAND gate left over from the previous experiment, plus the following experimental parts:
You should still have the DTL three-input NAND gate circuit left over from the previous experiment in place on your breadboard socket. If you removed these components or if you did not perform the previous DTL circuit experiments, go back and complete them now. Experiments for each logic family build on previous circuits. You will be removing some components and adding others to convert this circuit to a NOR gate.
Before you begin installing new components, verify that your breadboard socket still has the DTL inverter circuit in place from the previous experiment, as shown to the right. If not, go back and assemble that circuit now. If you did not perform the experiment previously, you should perform it now. If you left the extra diodes and jumpers in place from the experimental 3-input NAND circuit, remove them for now and put them aside for use in later experiments.
Click on the `Start' button below to begin modifying your previous circuit for this experiment.
Remove the orange jumper connected to S2, as shown in the assembly diagram to the right. Put this jumper aside for future use.
Click on the image of the jumper you just removed to go on to the next assembly step.
Remove the orange jumper connected to S1, as shown in the assembly diagram to the right. Put this jumper aside for future use.
Again, click on the image of the jumper you just removed to go on to the next assembly step.
Remove the input diode indicated in the assembly diagram to the right. Put this diode aside for future use.
Click on the image of the diode you just removed to go on to the next assembly step.
Remove the input diode indicated in the assembly diagram to the right. Put this diode aside for future use.
Click on the image of the diode you just removed to go on to the next assembly step.
Locate a 0.3" black jumper left over from previous experiments. If you don't have one already available, prepare a new jumper with 0.3" lead spacing. Install this jumper as shown in the assembly diagram to the right.
Click on the image if the jumper you just installed to go on to the next assembly step.
Locate a 4.7K, ¼-watt resistor and form the leads for a spacing of 0.5". Install this resistor in the location shown to the right.
Click on the image of this resistor to continue.
Locate a 1N914 signal diode and form its leads to a spacing of 0.3", as shown above. You may have a formed diode left over from your experiments with Diode Logic. If so, go ahead and use it here. Remember to keep the leads longer that resistor leads or jumpers, and observe the orientation of the diode in the assembly diagram as you install it on your breadboard socket.
As before, click on the image of this diode to move on to the next step of the installation.
Locate a second 1N914 signal diode and form its leads to a spacing of 0.3", as shown above. This may also be a diode left over from your DL experiments. Again, observe the orientation of the diode in the assembly diagram as you install it on your breadboard socket.
As before, click on the image of this diode to continue.
Locate a 2N4124 or similar NPN transistor and form its leads, if necessary, to a spacing of 0.1". Install the transistor as shown to the right. Be sure to observe the orientation of the transistor.
As always, click on the image of this transistor in the assembly diagram to continue the assembly of your experimental circuit.
If you don't have a 6" orange jumper left over from prior experiments, cut a 6" length of orange hookup wire and remove ¼" of insulation from each end. Refer to the assembly diagram and connect one end of this jumper to the free end of the input diode you just installed, and the other end to switch S7.
Click on the image if the jumper you just installed to continue.
This completes the construction of your experimental circuit. Check your assembly carefully against the figure to the right, and correct any errors you might find. Then, proceed with the experiment on the next part of this page.
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Turn on power to your experimental circuit, and move switches S0 and S7 to logic 0 input. Record the output state of this circuit, as indicated by L0, on the top row of the table to the right. Continue by setting S0 and S7 to each of the four possible combinations of two logic switches in turn, and record your results in the table to the right. When you have recorded the output state for all possible input combinations, look over your results. Do you recognize this logic function? Is it a NOR function? When you have made this determination, turn off the power to your experimental circuit and compare your results with the discussion below. |
You should have found that when both inputs are at logic 0, the output was a logic 1. However, when either input became a logic 1, that transistor turned on and forced the output to logic 0. Setting both inputs to logic 1 did not change this.
This is the normal behavior for a NOR gate, which is just an OR gate with an inverted output. Thus, this circuit does indeed perform a NOR function, as intended.
When you have completed this experiment, make sure power is turned off. Leave your experimental circuit intact; you will use it in your next experiment.
| Your next experiment is: Two, Two-Input DTL AOI Gate |
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